[Intel-gfx] [PATCH 4/4] drm/i915: Try removing the forcewake get/put around the fifo counting.

[Eric Anholt]

This reintroduces the IRQ misses, with 2 events in 1874 runs.

Signed-off-by: Eric Anholt <e...@anholt.net>
---
 drivers/gpu/drm/i915/i915_drv.c |   16 +++++++++++-----
 1 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index eabf82c..5444032 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -383,18 +383,24 @@ void __gen6_gt_wait_for_fifo(struct drm_i915_private 
*dev_priv)
 void
 intel_posting_read(struct drm_i915_private *dev_priv, uint32_t reg)
 {
-       int ret;
+       u32 fifo;
+       int loop = 5000;
 
        if (dev_priv->info->gen < 6) {
                (void)I915_READ_NOTRACE(reg);
                return;
        }
 
-       gen6_gt_force_wake_get(dev_priv);
-       ret = wait_for(I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES) == 0x3f, 500);
-       gen6_gt_force_wake_put(dev_priv);
+       if (!I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES))
+               printk("it got 0\n");
+
+       fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
+       while (fifo != 0x3f && --loop) {
+               udelay(10);
+               fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
+       }
 
-       WARN_ON_ONCE(ret != 0);
+       WARN_ON_ONCE(loop == 0);
 }
 
 static int i915_drm_freeze(struct drm_device *dev)
-- 
1.7.5.1

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