On Wed, 30 Mar 2011 17:07:11 +0100, Chris Wilson <ch...@chris-wilson.co.uk> wrote:
> +clear_err: > + I915_WRITE(GMBUS1 + reg_offset, GMBUS_SW_CLR_INT); > + POSTING_READ(GMBUS1 + reg_offset); > + I915_WRITE(GMBUS1 + reg_offset, 0); Any posting read needed here? > + > +done: > + I915_WRITE(GMBUS0 + reg_offset, 0); What's this new write doing in the non-error path? Do we need a posting read after it? -- keith.pack...@intel.com
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