On Tue, 1 Mar 2011 23:24:16 +0100, Jan Niehusmann <j...@gondor.com> wrote: > Indeed, setting dma_alloc_coherent should be sufficient, AFAIKT. After > all, only the HWS seems to be affected, which is allocated with > drm_pci_alloc, which in turn uses dma_alloc_coherent. > > I just tried the patch below, it also works for me (as expected). Added > the comment because otherwise it wouldn't be obvious why the mask gets > set to 32 bit. > > What I don't know is if really only Broadwater and Crestline chips are > affected. The tests were done with a Crestline one. But I think it's a > fair guess that the bug would have been noticed earlier if more recent > chips were affected, as >4GB RAM have become much more common since then.
The later chips do not use a physical address for the hardware status page. The patch looks good, thanks. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
