On 2011.02.26 00:05:27 +0100, Daniel Vetter wrote: > On Fri, Feb 25, 2011 at 10:18:16PM +0000, Chris Wilson wrote: > > So, I'm happy to use your patch to workaround the known erratum. I just > > wish I had an explanation as to what is actually causing the corruption. > > What I want to make sure is that we don't paper over a real bug by > > thinking it is yet another silicon issue. > > Actually, on style points I prefer your patch: The hw status page is > allocated with drm_pci_alloc which calls dma_alloc_coherent, so setting > the coherent mask is sufficient. The dma mask set in the gtt is > essentially useless, because we call get_user_pages on everything anyway > (in gem - iirc agp uses it). I just think it's confusing to limit the > general dma mask and continue to happily map pages above 4G. >
Think about IOMMU engine, we need to set dma_mask properly for returned dma mapping address be limited in max range that can be handled in GTT entry. -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
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