Starting with SandyBridge (though possible with earlier hacked BIOSes),
the BIOS may initialise the IGFX as secondary to a discrete GPU. Prior,
it would simply disable the integrated GPU. In such a configuration, the
IGFX is not a primary VGA controller and so should not take part in VGA
arbitration.
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_dma.c | 34 +++++++++++++++++++++-------------
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
3 files changed, 23 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 76f2df7..46ef1fb 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1183,6 +1183,8 @@ static int i915_load_modeset_init(struct drm_device *dev)
unsigned long prealloc_size, gtt_size, mappable_size;
int ret = 0;
+ dev_priv->is_vga = dev->pdev->class == PCI_CLASS_DISPLAY_VGA;
+
prealloc_size = dev_priv->mm.gtt->stolen_size;
gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT;
mappable_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
@@ -1228,19 +1230,23 @@ static int i915_load_modeset_init(struct drm_device
*dev)
if (ret)
DRM_INFO("failed to find VBIOS tables\n");
- /* if we have > 1 VGA cards, then disable the radeon VGA resources */
- ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode);
- if (ret)
- goto cleanup_ringbuffer;
+ if (dev_priv->is_vga) {
+ /* If we have > 1 VGA cards with a single output,
+ * then disable the radeon VGA resources.
+ */
+ ret = vga_client_register(dev->pdev, dev, NULL,
i915_vga_set_decode);
+ if (ret)
+ goto cleanup_ringbuffer;
- intel_register_dsm_handler();
+ intel_register_dsm_handler();
- ret = vga_switcheroo_register_client(dev->pdev,
- i915_switcheroo_set_state,
- NULL,
- i915_switcheroo_can_switch);
- if (ret)
- goto cleanup_vga_client;
+ ret = vga_switcheroo_register_client(dev->pdev,
+ i915_switcheroo_set_state,
+ NULL,
+
i915_switcheroo_can_switch);
+ if (ret)
+ goto cleanup_vga_client;
+ }
/* IIR "flip pending" bit means done if this bit is set */
if (IS_GEN3(dev) && (I915_READ(ECOSKPD) & ECO_FLIP_DONE))
@@ -2106,8 +2112,10 @@ int i915_driver_unload(struct drm_device *dev)
dev_priv->child_dev_num = 0;
}
- vga_switcheroo_unregister_client(dev->pdev);
- vga_client_register(dev->pdev, NULL, NULL, NULL);
+ if (dev_priv->is_vga) {
+ vga_switcheroo_unregister_client(dev->pdev);
+ vga_client_register(dev->pdev, NULL, NULL, NULL);
+ }
}
/* Free error state after interrupts are fully disabled. */
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 2d31f5f..7fbb132 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -60,7 +60,7 @@ extern int intel_agp_enabled;
#define INTEL_VGA_DEVICE(id, info) { \
.class = PCI_CLASS_DISPLAY_VGA << 8, \
- .class_mask = 0xffff00, \
+ .class_mask = 0xff0000, \
.vendor = 0x8086, \
.device = id, \
.subvendor = PCI_ANY_ID, \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 52ceae5..2b274f4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -262,6 +262,7 @@ typedef struct drm_i915_private {
int has_gem;
int relative_constants_mode;
+ int is_vga;
void __iomem *regs;
--
1.7.2.3
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