Some BO is required to have cached attribute in GTT, e.g PIPE_CONTROL store DW buffer used for occlusion query function. This one adds new flags for that within bo create ioctl.
Signed-off-by: Zhenyu Wang <zhen...@linux.intel.com> --- drivers/gpu/drm/i915/i915_dma.c | 3 +++ drivers/gpu/drm/i915/i915_gem.c | 4 ++++ include/drm/i915_drm.h | 5 ++++- 3 files changed, 11 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index e9fb895..df5a248 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -778,6 +778,9 @@ static int i915_getparam(struct drm_device *dev, void *data, case I915_PARAM_HAS_COHERENT_RINGS: value = 1; break; + case I915_PARAM_HAS_CREATE_CACHED: + value = 1; + break; default: DRM_DEBUG_DRIVER("Unknown parameter %d\n", param->param); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 27fa2a1..8bc5d05 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -216,6 +216,10 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data, return ret; } + /* Setup required CPU cached bit for bo, e.g query obj */ + if (args->flags == DRM_I915_GEM_CREATE_CACHED) + obj->agp_type = AGP_USER_CACHED_MEMORY; + /* drop reference from allocate - handle holds it now */ drm_gem_object_unreference(&obj->base); trace_i915_gem_object_create(obj); diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index a2776e2..b34db99 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -289,6 +289,7 @@ typedef struct drm_i915_irq_wait { #define I915_PARAM_HAS_BLT 11 #define I915_PARAM_HAS_RELAXED_FENCING 12 #define I915_PARAM_HAS_COHERENT_RINGS 13 +#define I915_PARAM_HAS_CREATE_CACHED 14 typedef struct drm_i915_getparam { int param; @@ -370,6 +371,8 @@ struct drm_i915_gem_init { __u64 gtt_end; }; +#define DRM_I915_GEM_CREATE_CACHED 1 + struct drm_i915_gem_create { /** * Requested size for the object. @@ -383,7 +386,7 @@ struct drm_i915_gem_create { * Object handles are nonzero. */ __u32 handle; - __u32 pad; + __u32 flags; }; struct drm_i915_gem_pread { -- 1.7.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx