A little less I think. I remember their meaning became vague when comparing performance and MIPS of Amdahl and IBM machines gave unexplainable differences during the 80's. And when IBM started putting more functionality into an instruction, if was definitely renamed to Meaningless Indicator of Processor Speed.
Kees. > -----Original Message----- > From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On > Behalf Of Seymour J Metz > Sent: 29 August, 2019 19:04 > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: Assembler :- PC Instruction > > SVC itself performs a simple function. SVC together with its interrupt > handlers is not so simple. What with the serialization for the GETMAIN or > whatever it uses these days, I'd expect it to be at least as expensive as > PC. If you need to operate in another address space, add in the overhead > of acquiring, scheduling and freeing SRBs. > > > The times that machine performance could be expressed in Million > Instructions Per Second are long gone. > > > They've been gone for half a century, if they ever existed. > > > -- > Shmuel (Seymour J.) Metz > http://mason.gmu.edu/~smetz3 > > > ________________________________________ > From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf > of Vernooij, Kees (ITOP NM) - KLM <kees.verno...@klm.com> > Sent: Thursday, August 29, 2019 8:27 AM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: Assembler :- PC Instruction > > "against SVC plus the SVC interrupt handler". > Possibly also: Plus SVC code? > The SVC instruction performs a function, the PC instruction does too. > > From what I understood of the PC instruction: with 1 instruction you can > now execute a 'function' that might have taken pages of assembler > instructions before. > > The times that machine performance could be expressed in Million > Instructions Per Second are long gone. > > Kees. > > > -----Original Message----- > > From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On > > Behalf Of Peter Relson > > Sent: 29 August, 2019 13:45 > > To: IBM-MAIN@LISTSERV.UA.EDU > > Subject: Re: Assembler :- PC Instruction > > > > <snip> > > You can do a BASR and STORAGE OBTAIN, STORAGE RELEASE and BR in less > time > > than a BAKR. > > </snip> > > > > No you can't. > > > > <snip> > > How does its performance stack up against SVC? > > </snip> > > > > That's not a useful comparison. What is useful is "how does its > > performance stack up against SVC plus the SVC interrupt handler". > > > > Peter Relson > > z/OS Core Technology Design > > > > > > ---------------------------------------------------------------------- > > For IBM-MAIN subscribe / signoff / archive access instructions, > > send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN > ******************************************************** > For information, services and offers, please visit our web site: > http://secure- > web.cisco.com/1yFCMng_oi34MeuWoGQVFSplOg6fpaFLyxdbGdQb9STPypzNLAxj2z3H1yPe > 4hmcGsoQrveXhGIGpIQn4y5avwq7BULLqLr7LDIdVd3uZfyPSdpqKPZLOf85a9_UOdAfEEkGjP > nXcTp7oZjO72UlCrOrkWCx9XGTouvxIvkrdhdxx7mbiJCUcsSNwdIhGoKmSm_S4VqyCCu_- > 5BvvEZ79ciMla-Ce6L9JM5Ftywxolu5eN46Eq6qEk2Cf- > Zcs5T9IkVQzK7gnyAmr3_tZBL1XW1EDny_9mYCBo58WeWGmKDzZaHMjFOWAKa7le7wuJMXxvxG > huhm_EyVpP7hsmqb89fuquitBk3uYlWjLHQFCW51CPwAUMtM3_g4RZTozHtzb/http%3A%2F%2 > Fwww.klm.com. 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