ETCRE et al are part of the setup prior to issuing the PC instruction; the 
actual implementation of the PC is a black box and need not be the same between 
models, as long as it complies with PoOps.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


________________________________________
From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf of Jon 
Perryman <jperr...@pacbell.net>
Sent: Thursday, August 29, 2019 12:10 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Assembler :- PC Instruction

 For "who will perform the translation process", it's not going to be clear. 
First, rather than translation, the PC instruction builds the environment from 
the token. ETDEF defines the  PC environment but ETCRE or ETCON could easily 
insert calls into the environment entry without us being aware. P/OPS only 
tells us the hardware side and we don't have access to the internals (e.g. 
establishing ARR). So the answer is we can't say for sure.

Jon.

    On Wednesday, August 28, 2019, 12:36:10 AM PDT, SUBSCRIBE IBM-MAIN 
Anonymous <apoorva.kanm...@gmail.com> wrote:

 Thanks for your response. Yes I agree that PC doesn't involve any 
interruption. "Principles of operations" manual clearly explains the PC 
translation process but I wanted to know "Who" will perform this translation 
process? For example we have "Dynamic Address translation" facility to 
transform Virtual addresses, and is there any similar facility to perform PC 
translation process.

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