The notation that would be clearest is to number the bits from right to left. However, that may well cause other logical problems on a big-endian architecture. And obviously, such a change would be ludicrous at this point.
I don't think there's any way to support the old 32-bit numbering that would solve anything. Fixing a few mistakes now & then should be fine. sas On Thu, Jun 27, 2019 at 7:49 AM Peter Relson <rel...@us.ibm.com> wrote: > I (to some extent "unfortunately") expect such inconsistency across the > suite of books (imagine if we still supported both ESA/390 and z > Architectures as options -- what "notation" would we use)? The effort to > change every 32-bit-register bit reference to its "appropriate" > 64-bit-register bit reference is likely to be more than anyone is willing > to commit to (no matter how good an idea it is).. > > But surely we should expect to be consistent for a given macro. > > Perhaps someone can suggest a notation that would make it clear "this is a > bit reference that applies to a 64-bit register". Using "the words" can > make it clear but is cumbersome. "Bits 32.24-31" (vs "Bits 24-31 of the > 32-bit register"), "Bits 64.15-23" (vs "bits 15-23 of the 64-bit > register"), "Control Register 2.64.0-31" (vs "64-bit Control register 2 > bits 0-31"). Not pretty. (Obviously if the numeric range includes a value > >= 32, there is no ambiguity, so once converted the cases Charles pointed > out will be clear enough without additional clarification.) > > Peter Relson > z/OS Core Technology Design > > > ---------------------------------------------------------------------- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN > -- sas ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
