On 3/6/2019 8:18 PM, Charles Mills wrote:
My imperfect model is that main storage is the new disk. Figure that
instructions take no time at all and memory accesses take forever.
Of course, you need to pay attention to cache effects -- *especially* to
avoid sharing R/W cache lines across CPs. But, that doesn't mean you
should completely ignore instruction speed.
Here are three instructions guaranteed to produce the identical result:
XGR R0,R0
LGHI R0,0
MGHI R0,0
As you might expect, the MGHI runs _significantly_ slower than the other
two. XGR and LGHI are similar, but LGHI is the only one of the three
that won't slow down to set the CC. Which would you use? (A silly
example since no sane person would think to use a multiply to load a
zero... LOL)
Using our benchmark program, we know some extremely helpful things about
the performance of significantly more complex instructions and we've
become aware of some that are surprisingly slow.
For example, what do you imagine is the performance difference between
doing LMH/LM vs an LMD -- I can tell you it's so significant that you
will try very hard to never, ever use LMD if you can help it! (Never use
it in commonly-used register unstacking code like we stupidly did at one
time...)
Likewise, if you knew a seemingly-innocent instruction ran 250 times
slower than a simple LG, would you try to avoid using it wherever you
could? (We avoid that one in high-performing code.)
--
Phoenix Software International
Edward E. Jaffe
831 Parkview Drive North
El Segundo, CA 90245
https://www.phoenixsoftware.com/
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