[email protected] (John Gilmore) writes: > I of course agree that "much work remains to be done"; but I am > hopeful that instruction-execution counts will in time come to > supplant CPU times, which are increasing problematic because no longer > simply reproducible, for performance comparisons and evaluations.
long ago and far away we were doing some optimization on superfast tcp/ip (for non-mainframe) 5k instruction pathlength and 5 buffer copies and work on eliminating all buffer copies. this was also motivation for adding hardware features that did direct storage to storage bypassing cache. a NFS 8kbyte packet was compared to LU6.2 through VTAM at 160k instruction pathlength and 14 buffer copies. for mainframe processor at the time, the 14 buffer copies could result in more processor time than the 160k instructions, the copies would all be cache misses as well as pushing stuff out of the cache that would have to be brought back in later. as an aside ... comingly used industry benchmark for processor throughput (used across wide variety of different processors with different instruction architectures) ... with references to MIPS and BIPS ... is actual number of iterations compared to base number of iterations on 370/158 taken to be 1MIP processor. -- virtualization experience starting Jan1968, online at home since Mar1970 ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
