I agree with this. The compiler folks work hard to generate the most efficient code based on the target HW. I can (usually) do slightly better than the compiler for small loops (where I know exactly what idiosyncrasies to take advantage of) but for anything more than a couple dozen HLL lines of code, the compiler beats me every time, even without optimizations.
With optimizations, I don't stand a chance. My take is that unless I need to very carefully set up for HW instructions that are not supported by the HLL (instructions such as those used for CPACF), it's never worth my time to do the work fully in assembler. Eric Rossman --------------------------------- ICSF Security Architect z/OS Security --------------------------------- -----Original Message----- From: IBM Mainframe Discussion List <[email protected]> On Behalf Of Colin Paice Sent: Friday, August 22, 2025 9:26 AM To: [email protected] Subject: [EXTERNAL] Re: RMODE 64 - Why? I remember about 40 years ago, the CICS development team were very pleased with their work optimising the CICS dispatcher code - the key code was written in assembler, and polished till they could get no more benefits from tuning it. Then came the next generation hardware, and all their polishing was of no benefit. They found it was best to structure their code and let the PLS compiler optimise it - which was generally better than they could. Colin ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
