Hi, The tag and data access latency you are seeing in \`src/mem/ruby/structures/RubyCache.py\` are actually not implemented by the RubyCache itself. Instead, SLICC machines query these parameters using the getTagLatency and getDataLatency member functions of the CacheMemory SimObject (these functions can be called from SLICC). If your machine decides to ignore these parameters, which is perfectly fine if you want your machine’s timings to be independent from the cache memory behavior, then these parameters won’t have any effect.
As for how does python SimObject’s work under the hood, this is a complex topic. Usually, you only need to understand that python SimObjects define a bunch of typed parameters (the \`param = Param.<Type>(…)\` attrinutes) that you can set using the \`obj.param = value\` and that will automagically be passed as constructor parameters to the corresponding C++ SimObject. The actual behavior is implemented on the C++ side. Regards, Gabriel
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