Hello,
I am running an x86 Full System Simulation. Looking at the fs.py arguments,
I could not find any argument that can let me configure the TLB
specifications for my simulation. So, I was wondering if someone would
guide me, please, on how to configure it. I took a look at the different
related files and scripts, but I could not locate where or how exactly to
include these configurations. Below, are the set specifications I would
like to apply:
L1 DTLB: 4KB pages: 64-entry, 4-way associative;
2MB pages: 32-entry 4-way associative;
1GB pages: 4-entry fully associative
L1 ITLB: 4KB pages: 128-entry, 4-way associative;
2MB pages: 8-entry, fully associative
L2 TLB (D/I) 4 KB pages: 512-entry, 4-way associative
So, given that I am simulation in FS mode using fs.py configuration file,
would you please guide me on where exactly I should modify or include the
TLB specs?
Thanks.
--
*Best,Abdelrahman Hussein*
MSc. Student -- Graduate RA/TA
School of Computing Sciences
Simon Fraser University, Canada
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