Hi Chen, I also had problems when trying to run benchmarks with thread synchronization on gem5 + FS + x86 + classic memory system. I described the problem here https://lists.gem5.org/archives/list/gem5-users@gem5.org/thread/MGIFEDFF6YRF2U764PWZJE7WOZC7BP3T/#AYN6SMZ6ISEZ755LKHV7BCIJJBRXZRPS
After that, I moved to gem5 + FS + arm64 + classic memory, which solved the problems. If you need to go with x86, I think ruby memory model also works (but I haven't tested). Good luck, Pedro. Chen Meng via gem5-users <gem5-users@gem5.org> escreveu no dia quarta, 23/03/2022 à(s) 10:35: > Hi Jason, > > Thanks for your reply! It's great to hear from you. > I was running SE mode with x86 ISA and classic caches, using the following > configuration. > > build/X86/gem5.opt configs/example/se.py \ > --caches --l3cache \ > --cmd=test_progs/arm_lock/arm_lock \ > --num-cpus=4 --cpu-type=TimingSimpleCPU --cpu-clock=4GHz > > I removed transactional memory part in my arm_lock program, with only > thread synchronization left. (pasted here: > https://paste.ubuntu.com/p/KdqwnmbHG7/) However, I still experienced > problems from running it. I also have tried to use many other types of > thread locks (std::mutex, spinlock based on compare_and_swap, spinlock > based on pure while loop, etc.) but few of them worked. > > So I am trying to figure out the following problems: > > 1. Does the synchronization issue in x86+classic combination affect thread > locks? If yes, how could it happen that Linux can run normally under FS > mode in company with x86 ISA and classic cache, since many OS scheduling > also requires synchronization? > > 2. Is there any other combination of ISA and memory system (e.g. x86+Ruby, > ARM+classic, etc.) that is capable of multi-threading synchronization? > > Best Regards, > Meng > _______________________________________________ > gem5-users mailing list -- gem5-users@gem5.org > To unsubscribe send an email to gem5-users-le...@gem5.org > %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s > -- Pedro Henrique Exenberger Becker Ph.D. Student at Universitat Politècnica de Catalunya
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