Hi Jason, Thanks for your reply! It's great to hear from you. I was running SE mode with x86 ISA and classic caches, using the following configuration.
build/X86/gem5.opt configs/example/se.py \ --caches --l3cache \ --cmd=test_progs/arm_lock/arm_lock \ --num-cpus=4 --cpu-type=TimingSimpleCPU --cpu-clock=4GHz I removed transactional memory part in my arm_lock program, with only thread synchronization left. (pasted here: https://paste.ubuntu.com/p/KdqwnmbHG7/) However, I still experienced problems from running it. I also have tried to use many other types of thread locks (std::mutex, spinlock based on compare_and_swap, spinlock based on pure while loop, etc.) but few of them worked. So I am trying to figure out the following problems: 1. Does the synchronization issue in x86+classic combination affect thread locks? If yes, how could it happen that Linux can run normally under FS mode in company with x86 ISA and classic cache, since many OS scheduling also requires synchronization? 2. Is there any other combination of ISA and memory system (e.g. x86+Ruby, ARM+classic, etc.) that is capable of multi-threading synchronization? Best Regards, Meng _______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
