Hi Felipe, On the I side, there is a fetch buffer so we only access the I cache when we need a new line. Thus, you will only see 1 access even though we read multiple words out of the same cache line. On the D side, however, every single read/write will count as a D cache access.
Andreas From: gem5-users <[email protected]<mailto:[email protected]>> on behalf of Felipe de Azevedo Piovezan <[email protected]<mailto:[email protected]>> Reply-To: gem5 users mailing list <[email protected]<mailto:[email protected]>> Date: Friday, 13 November 2015 at 15:58 To: "[email protected]<mailto:[email protected]>" <[email protected]<mailto:[email protected]>> Subject: Re: [gem5-users] How come there are more data than instruction accesses on L1 caches? I'm sorry, I hit send by mistake. Here is the complete mail: Hi all, I've been running some experiments with gem 5 simulating a single arm processor with two L1 caches (data + instructions) and one main memory. On the stats.txt file, these two lines seem very conflicting to me: system.cpu.dcache.overall_accesses::total 10379015 system.cpu.icache.overall_accesses::total 8474675 On the ARM ISA, no instruction can access more than one memory location (not using about SIMD here). Is there any simulation aspect of GEM5 that could be causing this? This is the way I'm calling gem5: ../../gem5/gem5-stable/build/ARM/gem5.opt --outdir=gem5output/p256.32.159.out_l1_1024B_2_l2_1MB_2_main_512kB ../../gem5/gem5-stable/configs/example/se.py --cpu-type arm_detailed --caches --mem-type=simple_mem --l1i_size=1024B --l1d_size=1024B --l1d_assoc=2 --l1i_assoc=2 --mem-size=512kB -c p256.32.159.out On 13 November 2015 at 13:54, Felipe de Azevedo Piovezan <[email protected]<mailto:[email protected]>> wrote: Hi all, I've been running some experiments with gem 5 simulating a single arm processor with two L1 caches (data + instructions) and one main memory. On the stats.txt file, these two lines seem very conflicting to me: system.cpu.dcache.overall_accesses::total 10379015 system.cpu.icache.overall_accesses::total 8474675 On the ARM -- Felipe -- Felipe ________________________________ -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
_______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
