I am talking about FS mode. I couldn't get the point about page-table walker used in gem5. Is it bulky at the moment ?! In other words, OS is the only page table manager in FS mode.?! I've seen you add PageTableEntry to the new released code! But I could not guess what is the reason behind that.
On Tue, Oct 7, 2014 at 6:03 PM, Steve Reinhardt <ste...@gmail.com> wrote: > Are you talking about SE or FS mode? In SE mode, typically the > ISA-independent PageTable class is used to hold the page tables, and no > walker is needed. In FS mode, the page tables are constructed in the > simulated physical memory by the OS running on the simulated platform; we > use the page-table walker to walk those tables on a TLB miss, but gem5 > itself isn't involved in maintaining them, and the PageTable class is not > used. > > (We have recently added native-mode page table support in SE mode for KVM, > which blurs the distinctions above, but that's not a typical use case at > this point.) > > Steve > > > On Tue, Oct 7, 2014 at 7:48 AM, mohammad reza Soltaniyeh via gem5-users < > gem5-users@gem5.org> wrote: > >> Dear All, >> >> I am working with X86 architecture in Gem5 and more specifically I am >> interested in Virtual address management in gem5. However, I have some >> difficulties in understanding the big picture of page table management in >> gem5. I divide them into three main modules. TLB, PageTable, and >> PageTableWalker. To put my question in perspective, I give an example. >> >> When a memory request comes in, we first try to access TLB to check >> whether corresponding entry is available there or not! So, in which module >> we search withing the TLB. Actually, I don't know which data structures has >> been used for TLB. I just say List, Trie and even simple array in the codes >> but which one is really works as TLB?! This is my first question. >> >> Then, suppose we have a miss in TLB access. In this case, we should refer >> to the Page table to found possible entry there. Where we do so in gem5 ?! >> In other words, I can not find any structure which can play the role of >> pagetable in our architecture. There is no clear definition of page table >> in the codes.?! this is my second question. Putting it another way, where >> we check if access to the page table is miss or hit?! >> >> Then, in the case we have a page table fault, we should create a new page >> table entry and add it to both pagetable and TLB. I guess this should >> happen somewhere in pagetable_walker code. Can you please also exactly >> where i can find the codes for this part?! >> >> I hope my questions would be clear enough. I just want to get the whole >> idea of page table management in gem5 in order to apply some modification! >> >> Thank you in advance! >> >> Regards, >> boyrealmadred >> >> _______________________________________________ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > >
_______________________________________________ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
