Sushant <thisissush <at> gmail.com> writes: > > I am looking for a similar solution too. > I am running Gem5 in syscall emulation mode. > And I need to transfer some data from one-core-to-another. > Any suggestions would be helpful. > > Thanks >
I managed to do this but I am sure there is a much cleaner way .... Add an extra module in the cpu folder .... basically copy all the file from cpu/bpred into a cpu/new_folder and rename/modify as per your needs Assuming your new module is inter_cpu_bus in config script assign the same module to different cpus Eg. system.cpu[0].inter_cpu_bus = InterCPUBus() system.cpu[1].inter_cpu_bus = system.cpu[0].inter_cpu_bus An instance of inter_cpu_bus is now shared by both the Cpus. Its a crude way (e.g.: no latency) but it gets the job done. Would appreciate if someone shares a better way _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
