tl;dr Detailed cpu borked? --prog-interval borked? definitely :(
Greetings,
My research group has recently started using Gem5 (coming from m5) and we have
noticed an anomaly with the Alpha SE Detailed(O3) CPU model. Of the 4 types of
CPU available (Atomic, Detailed(O3), Timing, InOrder) all but the Detailed
model take the exact same number of instructions to complete a benchmark. The
Detailed CPU consistently requires less instructions (about %10 less) to
complete a given benchmark. Multiple benchmarks have indicated the same result.
We are aware that the main difference between the Detailed CPU and the others
is that it is an out-of-order processor. Is it possible this is the cause of
the difference? Is it simply handling the instructions more efficiently?
During our testing, we attempted to use fast forwarding to convince ourselves
that the different CPU types actually did commit a different number of
instructions. In, libquantum, one of the benchmarks in which we noticed this
behavior, the atomic cpu commits ~289 million instructions while the detailed
cpu commits ~269 million instructions. With fast forwarding (using the atomic
cpu and switching to the detailed model at 200 million instructions) the total
number of instructions committed is ~282. This number convinces us that the
detailed model indeed commits a different amount of instructions than the other
types.
Also, during the fast forward test, we set --prog-interval to 1,000,000
instructions. The interval behaved normally up to the switch, but once the
detailed CPU took over, it started reporting the same value every time. Each
printout after the switch was stuck at 2,000,001 instructions and the committed
instruction value was 0. However, the simulation completed as if it committed
all instructions successfully. We will submit a bug report for this specific
issue, but if anyone else has experienced this, please let us know.
If these are well-known or obvious issues, I apologize in advance for wasting
your time. Let it be known that I did search the archives to no avail.
Any insight would be most appreciated.
Thank you,
Zeb Barnett
-----
Student Research Assistant
High Performance Computer Lab
Lamar University
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