It doesn't support these features "out-of-the-box." It would certainly be possible to implement them, but you'll have to write code into the CPU models to make it work.
Ali On Oct 12, 2012, at 10:26 PM, mir shan wrote: > Aslam O Alykum Ali and Hi community > > 1 Does this supported by Gem5 > modified the simulator to support SOE(Switch on Event) multithreading, > switching on L2 cache misses (last-level cache misses). > > 2. Which files involved in this work. > > regards > Mir > > > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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