There are specific comments inline. Overall, I think you need to have a better understanding of the options that you are trying to work with.

On Thu, 4 Oct 2012, Tao Zhang wrote:

Hi Nilay,

Maybe I didn't make it clear. What I want is to run Multi-programmed simulation rather than multi-threaded simulation. In other words, I want 4 cores to run 4 benchmarks (though they are all same) and each core has only 1 thread. As a result, I set "np = 4 and numThreads = 1" in my configuration script. I also produced 4 identical LiveProcess() and assigned them to each core. However, the simulation immediately terminated after the cpu switching from atomic to detailed, with message "a thread reached the max instruction count". I go through the Simulation.py, src/cpu/base.cc, src/cpu/O3/commit_impl.cc but didn't find the clue that I have wrongly set the -F and -I with the same number (100000000).

Can you clearly state how is this different from what you expect?


If the instruction count is based on the thread and no change during the cpu switching, why I can use -F and -I together for single-core simulation? The

Why not? You need to better understand the meaning of those two options.

final results show that the atomic cpu run the first 100000000 instructions and then the detailed cpu run the second half instruction. The total "sim_insts" in the final stats is 200000001. Also, I did a simple test to

What were the option values that you supplied?

change the -F and -I number as "-F 1000 -I 6000", which is supposed to work well. Unfortunately, I got the same result...

What's the same result that you are referring to?


It should be easy to fix as soon as I can find the codes for the cpu switch. Do you mind tell me where it is so that I can work it out? Also, I have

It is not clear what is incorrect, hence fixing some thing is not out of question right now.


another question: Even though the benchmarks are same, I assume the physical address range to accommodate each benchmark is still different since gem5 generates 4 process stacks with different address mapping. Is it correct?


I think this is correct.

--
Nilay
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