Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/39324 )
Change subject: arch,cpu: Move buildRetPC into the StaticInst class.
......................................................................
arch,cpu: Move buildRetPC into the StaticInst class.
This was an inline function defined for each ISA, but really it makes
more sense for it to be defined by the instruction classes. The actual
return address for any given instruction can best be calculated when you
know what that instruction actually does, and also the instructions will
know about ISA level PC management.
Change-Id: I2c5203aefa90f2f26ecd94e82b925c6b552e33d3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39324
Reviewed-by: Gabe Black <[email protected]>
Maintainer: Gabe Black <[email protected]>
Tested-by: kokoro <[email protected]>
---
M src/arch/arm/insts/static_inst.hh
M src/arch/arm/utility.hh
M src/arch/mips/isa/base.isa
M src/arch/mips/utility.hh
M src/arch/power/insts/static_inst.hh
M src/arch/power/utility.hh
M src/arch/riscv/insts/static_inst.hh
M src/arch/riscv/utility.hh
M src/arch/sparc/insts/static_inst.hh
M src/arch/sparc/utility.hh
M src/arch/x86/insts/static_inst.hh
M src/arch/x86/utility.hh
M src/cpu/pred/bpred_unit.cc
M src/cpu/static_inst.hh
14 files changed, 59 insertions(+), 53 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/insts/static_inst.hh
b/src/arch/arm/insts/static_inst.hh
index b78f64a..2693f1e 100644
--- a/src/arch/arm/insts/static_inst.hh
+++ b/src/arch/arm/insts/static_inst.hh
@@ -201,6 +201,14 @@
uint64_t getEMI() const override { return machInst; }
+ PCState
+ buildRetPC(const PCState &curPC, const PCState &callPC) const override
+ {
+ PCState retPC = callPC;
+ retPC.uEnd();
+ return retPC;
+ }
+
std::string generateDisassembly(
Addr pc, const Loader::SymbolTable *symtab) const override;
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 1a12b6a..d38433e 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -56,14 +56,6 @@
namespace ArmISA {
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
- PCState retPC = callPC;
- retPC.uEnd();
- return retPC;
-}
-
inline bool
testPredicate(uint32_t nz, uint32_t c, uint32_t v, ConditionCode code)
{
diff --git a/src/arch/mips/isa/base.isa b/src/arch/mips/isa/base.isa
index 0175bcc..45f873f 100644
--- a/src/arch/mips/isa/base.isa
+++ b/src/arch/mips/isa/base.isa
@@ -64,6 +64,15 @@
pc.advance();
}
+ PCState
+ buildRetPC(const PCState &curPC, const PCState &callPC) const
override
+ {
+ PCState ret = callPC;
+ ret.advance();
+ ret.pc(curPC.npc());
+ return ret;
+ }
+
size_t
asBytes(void *buf, size_t max_size) override
{
diff --git a/src/arch/mips/utility.hh b/src/arch/mips/utility.hh
index 6fb211d..eb7f74a 100644
--- a/src/arch/mips/utility.hh
+++ b/src/arch/mips/utility.hh
@@ -40,15 +40,6 @@
namespace MipsISA {
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
- PCState ret = callPC;
- ret.advance();
- ret.pc(curPC.npc());
- return ret;
-}
-
////////////////////////////////////////////////////////////////////////
//
// Floating Point Utility Functions
diff --git a/src/arch/power/insts/static_inst.hh
b/src/arch/power/insts/static_inst.hh
index 403d358..585e8a3 100644
--- a/src/arch/power/insts/static_inst.hh
+++ b/src/arch/power/insts/static_inst.hh
@@ -69,6 +69,14 @@
pcState.advance();
}
+ PCState
+ buildRetPC(const PCState &curPC, const PCState &callPC) const override
+ {
+ PCState retPC = callPC;
+ retPC.advance();
+ return retPC;
+ }
+
size_t
asBytes(void *buf, size_t max_size) override
{
diff --git a/src/arch/power/utility.hh b/src/arch/power/utility.hh
index bdb201d..7c892d4 100644
--- a/src/arch/power/utility.hh
+++ b/src/arch/power/utility.hh
@@ -37,14 +37,6 @@
namespace PowerISA {
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
- PCState retPC = callPC;
- retPC.advance();
- return retPC;
-}
-
void copyRegs(ThreadContext *src, ThreadContext *dest);
static inline void
diff --git a/src/arch/riscv/insts/static_inst.hh
b/src/arch/riscv/insts/static_inst.hh
index 1c57cc7..1c9c616 100644
--- a/src/arch/riscv/insts/static_inst.hh
+++ b/src/arch/riscv/insts/static_inst.hh
@@ -56,6 +56,15 @@
void advancePC(PCState &pc) const override { pc.advance(); }
+ PCState
+ buildRetPC(const PCState &curPC, const PCState &callPC) const override
+ {
+ PCState retPC = callPC;
+ retPC.advance();
+ retPC.pc(curPC.npc());
+ return retPC;
+ }
+
size_t
asBytes(void *buf, size_t size) override
{
diff --git a/src/arch/riscv/utility.hh b/src/arch/riscv/utility.hh
index 32cf046..3bbbd71 100644
--- a/src/arch/riscv/utility.hh
+++ b/src/arch/riscv/utility.hh
@@ -98,15 +98,6 @@
&& (reinterpret_cast<uint64_t&>(val)&0x0004000000000000ULL);
}
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
- PCState retPC = callPC;
- retPC.advance();
- retPC.pc(curPC.npc());
- return retPC;
-}
-
inline void
copyRegs(ThreadContext *src, ThreadContext *dest)
{
diff --git a/src/arch/sparc/insts/static_inst.hh
b/src/arch/sparc/insts/static_inst.hh
index 43d8d3d..ffcf135 100644
--- a/src/arch/sparc/insts/static_inst.hh
+++ b/src/arch/sparc/insts/static_inst.hh
@@ -116,6 +116,15 @@
{
return simpleAsBytes(buf, size, machInst);
}
+
+ PCState
+ buildRetPC(const PCState &curPC, const PCState &callPC) const override
+ {
+ PCState ret = callPC;
+ ret.uEnd();
+ ret.pc(curPC.npc());
+ return ret;
+ }
};
}
diff --git a/src/arch/sparc/utility.hh b/src/arch/sparc/utility.hh
index 053258f..e61989a 100644
--- a/src/arch/sparc/utility.hh
+++ b/src/arch/sparc/utility.hh
@@ -41,15 +41,6 @@
namespace SparcISA
{
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
- PCState ret = callPC;
- ret.uEnd();
- ret.pc(curPC.npc());
- return ret;
-}
-
void copyRegs(ThreadContext *src, ThreadContext *dest);
void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
diff --git a/src/arch/x86/insts/static_inst.hh
b/src/arch/x86/insts/static_inst.hh
index 64c56ea..52f8048 100644
--- a/src/arch/x86/insts/static_inst.hh
+++ b/src/arch/x86/insts/static_inst.hh
@@ -185,6 +185,14 @@
{
pcState.advance();
}
+
+ PCState
+ buildRetPC(const PCState &curPC, const PCState &callPC) const override
+ {
+ PCState retPC = callPC;
+ retPC.uEnd();
+ return retPC;
+ }
};
}
diff --git a/src/arch/x86/utility.hh b/src/arch/x86/utility.hh
index 79274ca..a7c2dfc 100644
--- a/src/arch/x86/utility.hh
+++ b/src/arch/x86/utility.hh
@@ -44,15 +44,6 @@
namespace X86ISA
{
-
- inline PCState
- buildRetPC(const PCState &curPC, const PCState &callPC)
- {
- PCState retPC = callPC;
- retPC.uEnd();
- return retPC;
- }
-
void copyRegs(ThreadContext *src, ThreadContext *dest);
void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc
index ff8c885..b25d115 100644
--- a/src/cpu/pred/bpred_unit.cc
+++ b/src/cpu/pred/bpred_unit.cc
@@ -170,7 +170,7 @@
// If it's a function return call, then look up the address
// in the RAS.
TheISA::PCState rasTop = RAS[tid].top();
- target = TheISA::buildRetPC(pc, rasTop);
+ target = inst->buildRetPC(pc, rasTop);
// Record the top entry of the RAS, and its index.
predict_record.usedRAS = true;
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index b014719..0bd2e50 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -325,6 +325,13 @@
virtual void advancePC(TheISA::PCState &pcState) const = 0;
+ virtual TheISA::PCState
+ buildRetPC(const TheISA::PCState &curPC,
+ const TheISA::PCState &callPC) const
+ {
+ panic("buildRetPC not defined!");
+ }
+
/**
* Return the microop that goes with a particular micropc. This should
* only be defined/used in macroops which will contain microops
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/39324
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I2c5203aefa90f2f26ecd94e82b925c6b552e33d3
Gerrit-Change-Number: 39324
Gerrit-PatchSet: 9
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Gabe Black <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Jason Lowe-Power <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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