Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/39324 )
Change subject: arch,cpu: Move buildRetPC into the StaticInst class.
......................................................................
arch,cpu: Move buildRetPC into the StaticInst class.
This was an inline function defined for each ISA, but really it makes
more sense for it to be defined by the instruction classes. The actual
return address for any given instruction can best be calculated when you
know what that instruction actually does, and also the instructions will
know about ISA level PC management.
Change-Id: I2c5203aefa90f2f26ecd94e82b925c6b552e33d3
---
M src/arch/arm/insts/static_inst.hh
M src/arch/arm/utility.hh
M src/arch/mips/isa/base.isa
M src/arch/mips/utility.hh
M src/arch/power/insts/static_inst.hh
M src/arch/power/utility.hh
M src/arch/riscv/insts/static_inst.hh
M src/arch/riscv/utility.hh
M src/arch/sparc/insts/static_inst.hh
M src/arch/sparc/utility.hh
M src/arch/x86/insts/static_inst.hh
M src/arch/x86/utility.hh
M src/cpu/pred/bpred_unit.cc
M src/cpu/static_inst.hh
14 files changed, 60 insertions(+), 53 deletions(-)
diff --git a/src/arch/arm/insts/static_inst.hh
b/src/arch/arm/insts/static_inst.hh
index e101d93..084342b 100644
--- a/src/arch/arm/insts/static_inst.hh
+++ b/src/arch/arm/insts/static_inst.hh
@@ -197,6 +197,15 @@
pcState.advance();
}
+
+ PCState
+ buildRetPC(const PCState &curPC, const PCState &callPC) const override
+ {
+ PCState retPC = callPC;
+ retPC.uEnd();
+ return retPC;
+ }
+
std::string generateDisassembly(
Addr pc, const Loader::SymbolTable *symtab) const override;
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index bd043df..302967b 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -55,14 +55,6 @@
namespace ArmISA {
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
- PCState retPC = callPC;
- retPC.uEnd();
- return retPC;
-}
-
inline bool
testPredicate(uint32_t nz, uint32_t c, uint32_t v, ConditionCode code)
{
diff --git a/src/arch/mips/isa/base.isa b/src/arch/mips/isa/base.isa
index cdd950c..3ebc9e2 100644
--- a/src/arch/mips/isa/base.isa
+++ b/src/arch/mips/isa/base.isa
@@ -63,6 +63,15 @@
pc.advance();
}
+ PCState
+ buildRetPC(const PCState &curPC, const PCState &callPC) const
override
+ {
+ PCState ret = callPC;
+ ret.advance();
+ ret.pc(curPC.npc());
+ return ret;
+ }
+
size_t
asBytes(void *buf, size_t max_size) override
{
diff --git a/src/arch/mips/utility.hh b/src/arch/mips/utility.hh
index 6fb211d..eb7f74a 100644
--- a/src/arch/mips/utility.hh
+++ b/src/arch/mips/utility.hh
@@ -40,15 +40,6 @@
namespace MipsISA {
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
- PCState ret = callPC;
- ret.advance();
- ret.pc(curPC.npc());
- return ret;
-}
-
////////////////////////////////////////////////////////////////////////
//
// Floating Point Utility Functions
diff --git a/src/arch/power/insts/static_inst.hh
b/src/arch/power/insts/static_inst.hh
index dc53bc1..11a2ad7 100644
--- a/src/arch/power/insts/static_inst.hh
+++ b/src/arch/power/insts/static_inst.hh
@@ -68,6 +68,14 @@
pcState.advance();
}
+ PCState
+ buildRetPC(const PCState &curPC, const PCState &callPC) const override
+ {
+ PCState retPC = callPC;
+ retPC.advance();
+ return retPC;
+ }
+
size_t
asBytes(void *buf, size_t max_size) override
{
diff --git a/src/arch/power/utility.hh b/src/arch/power/utility.hh
index bdb201d..7c892d4 100644
--- a/src/arch/power/utility.hh
+++ b/src/arch/power/utility.hh
@@ -37,14 +37,6 @@
namespace PowerISA {
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
- PCState retPC = callPC;
- retPC.advance();
- return retPC;
-}
-
void copyRegs(ThreadContext *src, ThreadContext *dest);
static inline void
diff --git a/src/arch/riscv/insts/static_inst.hh
b/src/arch/riscv/insts/static_inst.hh
index 149e847..712bb2a 100644
--- a/src/arch/riscv/insts/static_inst.hh
+++ b/src/arch/riscv/insts/static_inst.hh
@@ -51,6 +51,15 @@
public:
void advancePC(PCState &pc) const override { pc.advance(); }
+ PCState
+ buildRetPC(const PCState &curPC, const PCState &callPC) const override
+ {
+ PCState retPC = callPC;
+ retPC.advance();
+ retPC.pc(curPC.npc());
+ return retPC;
+ }
+
size_t
asBytes(void *buf, size_t size) override
{
diff --git a/src/arch/riscv/utility.hh b/src/arch/riscv/utility.hh
index 32cf046..3bbbd71 100644
--- a/src/arch/riscv/utility.hh
+++ b/src/arch/riscv/utility.hh
@@ -98,15 +98,6 @@
&& (reinterpret_cast<uint64_t&>(val)&0x0004000000000000ULL);
}
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
- PCState retPC = callPC;
- retPC.advance();
- retPC.pc(curPC.npc());
- return retPC;
-}
-
inline void
copyRegs(ThreadContext *src, ThreadContext *dest)
{
diff --git a/src/arch/sparc/insts/static_inst.hh
b/src/arch/sparc/insts/static_inst.hh
index 0237c98..eeb4bd9 100644
--- a/src/arch/sparc/insts/static_inst.hh
+++ b/src/arch/sparc/insts/static_inst.hh
@@ -111,6 +111,15 @@
{
return simpleAsBytes(buf, size, machInst);
}
+
+ PCState
+ buildRetPC(const PCState &curPC, const PCState &callPC) const override
+ {
+ PCState ret = callPC;
+ ret.uEnd();
+ ret.pc(curPC.npc());
+ return ret;
+ }
};
}
diff --git a/src/arch/sparc/utility.hh b/src/arch/sparc/utility.hh
index 8ec3e10..2bf8af0 100644
--- a/src/arch/sparc/utility.hh
+++ b/src/arch/sparc/utility.hh
@@ -41,15 +41,6 @@
namespace SparcISA
{
-inline PCState
-buildRetPC(const PCState &curPC, const PCState &callPC)
-{
- PCState ret = callPC;
- ret.uEnd();
- ret.pc(curPC.npc());
- return ret;
-}
-
void copyRegs(ThreadContext *src, ThreadContext *dest);
void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
diff --git a/src/arch/x86/insts/static_inst.hh
b/src/arch/x86/insts/static_inst.hh
index de41f47..6b12cf6 100644
--- a/src/arch/x86/insts/static_inst.hh
+++ b/src/arch/x86/insts/static_inst.hh
@@ -179,6 +179,14 @@
{
pcState.advance();
}
+
+ PCState
+ buildRetPC(const PCState &curPC, const PCState &callPC) const
override
+ {
+ PCState retPC = callPC;
+ retPC.uEnd();
+ return retPC;
+ }
};
}
diff --git a/src/arch/x86/utility.hh b/src/arch/x86/utility.hh
index 79274ca..a7c2dfc 100644
--- a/src/arch/x86/utility.hh
+++ b/src/arch/x86/utility.hh
@@ -44,15 +44,6 @@
namespace X86ISA
{
-
- inline PCState
- buildRetPC(const PCState &curPC, const PCState &callPC)
- {
- PCState retPC = callPC;
- retPC.uEnd();
- return retPC;
- }
-
void copyRegs(ThreadContext *src, ThreadContext *dest);
void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc
index e618fb5..5d6c969 100644
--- a/src/cpu/pred/bpred_unit.cc
+++ b/src/cpu/pred/bpred_unit.cc
@@ -166,7 +166,7 @@
// If it's a function return call, then look up the address
// in the RAS.
TheISA::PCState rasTop = RAS[tid].top();
- target = TheISA::buildRetPC(pc, rasTop);
+ target = inst->buildRetPC(pc, rasTop);
// Record the top entry of the RAS, and its index.
predict_record.usedRAS = true;
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index e5d9753..5e81a79 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -340,6 +340,13 @@
virtual void advancePC(TheISA::PCState &pcState) const = 0;
+ virtual TheISA::PCState
+ buildRetPC(const TheISA::PCState &curPC,
+ const TheISA::PCState &callPC) const
+ {
+ panic("buildRetPC not defined!");
+ }
+
/**
* Return the microop that goes with a particular micropc. This should
* only be defined/used in macroops which will contain microops
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I2c5203aefa90f2f26ecd94e82b925c6b552e33d3
Gerrit-Change-Number: 39324
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black <[email protected]>
Gerrit-MessageType: newchange
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