Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/34376 )
Change subject: dev-arm: Define a ParentMem object for DTB autogen
......................................................................
dev-arm: Define a ParentMem object for DTB autogen
A memory willing to autogenerate child nodes can do that directly in
the generateDeviceTree method. However sometimes portions of memory
(child nodes) are tagged for specific applications. Hardcoding the
child node in the parent memory class is not flexible, so we delegate
this to the application model, which is registering the generator
helper via the ParentMem interface
JIRA: https://gem5.atlassian.net/browse/GEM5-768
Change-Id: I5fa5bac0decf5399dbaa3804569998dc5e6d7bc0
Signed-off-by: Giacomo Travaglini <[email protected]>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34376
Tested-by: kokoro <[email protected]>
Reviewed-by: Richard Cooper <[email protected]>
---
M src/dev/arm/RealView.py
1 file changed, 36 insertions(+), 1 deletion(-)
Approvals:
Richard Cooper: Looks good to me, approved
Giacomo Travaglini: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 5397de5..d35f7ce 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -543,7 +543,40 @@
yield node
-class MmioSRAM(SimpleMemory):
+class ParentMem(SimpleMemory):
+ """
+ This is a base abstract class for child node generation
+ A memory willing to autogenerate child nodes can do that
+ directly in the generateDeviceTree method.
+ However sometimes portions of memory (child nodes) are tagged
+ for specific applications. Hardcoding the child node in the
+ parent memory class is not flexible, so we delegate this
+ to the application model, which is registering the generator
+ helper via the ParentMem interface.
+ """
+ def __init__(self, *args, **kwargs):
+ super(ParentMem, self).__init__(*args, **kwargs)
+ self._generators = []
+
+ def addSubnodeGenerator(self, gen):
+ """
+ This is the method a client application would use to
+ register a child generator in the memory object.
+ """
+ self._generators.append(gen)
+
+ def generateSubnodes(self, node, state):
+ """
+ This is the method the memory would use to instantiate
+ the child nodes via the previously registered generators.
+ """
+ for subnode_gen in self._generators:
+ node.append(subnode_gen(state))
+
+class MmioSRAM(ParentMem):
+ def __init__(self, *args, **kwargs):
+ super(MmioSRAM, self).__init__(**kwargs)
+
def generateDeviceTree(self, state):
node = FdtNode("sram@%x" % long(self.range.start))
node.appendCompatible(["mmio-sram"])
@@ -559,6 +592,8 @@
state.addrCells(self.range.start) +
state.sizeCells(self.range.size()) ))
+ self.generateSubnodes(node, state)
+
yield node
class FVPBasePwrCtrl(BasicPioDevice):
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I5fa5bac0decf5399dbaa3804569998dc5e6d7bc0
Gerrit-Change-Number: 34376
Gerrit-PatchSet: 7
Gerrit-Owner: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Andreas Sandberg <[email protected]>
Gerrit-Reviewer: Ciro Santilli <[email protected]>
Gerrit-Reviewer: Giacomo Travaglini <[email protected]>
Gerrit-Reviewer: Richard Cooper <[email protected]>
Gerrit-Reviewer: kokoro <[email protected]>
Gerrit-MessageType: merged
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