Günter Dannoritzer wrote: > Hi, > > Is anybody using Icarus Verilog for post synthesis simulation?
Yes, me, to a degree. > Is there a way to compile the SIMPRIM library from Xilinx into a library > file or does that need to be compiled every time again from scratch when > running the compilation? Well, with Icarus Verilog there is no format for compiled libraries. You point it at the simprim directory from Xilinx and away you go. > Also, does the iSDF plugin support all the primitives generated by > Xilinx tools? I don't know. I also don't know the current status of the iSDF plugin. I don't normally bother with back-annotated timing data and never feel the need. I would like to get better specify/SDF support into the base tool some day, but not today. -- Steve Williams "The woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep." _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
