https://gcc.gnu.org/g:5ca4e161b67606b8d41d6ec906349dc88303332b

commit r14-10265-g5ca4e161b67606b8d41d6ec906349dc88303332b
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Sat Jun 1 00:22:30 2024 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           | 35 +++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |  2 +-
 gcc/testsuite/ChangeLog | 16 ++++++++++++++++
 3 files changed, 52 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5a99f61d636..bba361c7ad1 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,38 @@
+2024-05-31  Uros Bizjak  <ubiz...@gmail.com>
+
+       Backported from master:
+       2024-05-31  Uros Bizjak  <ubiz...@gmail.com>
+
+       PR target/115297
+       * config/alpha/alpha.md (<any_divmod:code>si3): Wrap DImode
+       operands 3 and 4 with truncate:SI RTX.
+       (*divmodsi_internal_er): Ditto for operands 1 and 2.
+       (*divmodsi_internal_er_1): Ditto.
+       (*divmodsi_internal): Ditto.
+       * config/alpha/constraints.md ("b"): Correct register
+       number in the description.
+
+2024-05-31  Richard Sandiford  <richard.sandif...@arm.com>
+
+       Backported from master:
+       2024-05-24  Richard Sandiford  <richard.sandif...@arm.com>
+
+       PR tree-optimization/115192
+       * tree-data-ref.cc (create_intersect_range_checks): Take the
+       alignment of the access sizes into account.
+
+2024-05-31  Hongyu Wang  <hongyu.w...@intel.com>
+
+       Backported from master:
+       2024-05-29  Hongyu Wang  <hongyu.w...@intel.com>
+
+       PR target/113719
+       * config/i386/i386-options.cc (ix86_override_options_after_change):
+       Remove call to ix86_default_align and
+       ix86_recompute_optlev_based_flags.
+       (ix86_option_override_internal): Call ix86_default_align and
+       ix86_recompute_optlev_based_flags.
+
 2024-05-30  YunQiang Su  <s...@gcc.gnu.org>
 
        Backported from master:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index a7808a0e59e..fe85bc7903e 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240531
+20240601
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 54e24006a9a..91b46fe97da 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,19 @@
+2024-05-31  Uros Bizjak  <ubiz...@gmail.com>
+
+       Backported from master:
+       2024-05-31  Uros Bizjak  <ubiz...@gmail.com>
+
+       PR target/115297
+       * gcc.target/alpha/pr115297.c: New test.
+
+2024-05-31  Richard Sandiford  <richard.sandif...@arm.com>
+
+       Backported from master:
+       2024-05-24  Richard Sandiford  <richard.sandif...@arm.com>
+
+       PR tree-optimization/115192
+       * gcc.dg/vect/pr115192.c: New test.
+
 2024-05-29  Richard Biener  <rguent...@suse.de>
 
        Backported from master:

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