https://gcc.gnu.org/g:acdf0f732adc585bdbd52b5cb57d942125a98b8e

commit r13-8814-gacdf0f732adc585bdbd52b5cb57d942125a98b8e
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Sat Jun 1 00:21:10 2024 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           | 35 +++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |  2 +-
 gcc/testsuite/ChangeLog | 20 ++++++++++++++++++++
 3 files changed, 56 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d03695d4dba..6958e620310 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,38 @@
+2024-05-31  Richard Sandiford  <richard.sandif...@arm.com>
+
+       Backported from master:
+       2024-01-29  Richard Sandiford  <richard.sandif...@arm.com>
+
+       PR target/113281
+       * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Remove
+       workaround for right shifts.
+       (vect_truncatable_operation_p): Handle NEGATE_EXPR and BIT_NOT_EXPR.
+       (vect_determine_precisions_from_range): Be more selective about
+       which codes can be narrowed based on their input and output ranges.
+       For shifts, require at least one more bit of precision than the
+       maximum shift amount.
+
+2024-05-31  Richard Sandiford  <richard.sandif...@arm.com>
+
+       Backported from master:
+       2024-05-24  Richard Sandiford  <richard.sandif...@arm.com>
+
+       PR tree-optimization/115192
+       * tree-data-ref.cc (create_intersect_range_checks): Take the
+       alignment of the access sizes into account.
+
+2024-05-31  Hongyu Wang  <hongyu.w...@intel.com>
+
+       Backported from master:
+       2024-05-29  Hongyu Wang  <hongyu.w...@intel.com>
+
+       PR target/113719
+       * config/i386/i386-options.cc (ix86_override_options_after_change):
+       Remove call to ix86_default_align and
+       ix86_recompute_optlev_based_flags.
+       (ix86_option_override_internal): Call ix86_default_align and
+       ix86_recompute_optlev_based_flags.
+
 2024-05-30  YunQiang Su  <s...@gcc.gnu.org>
 
        Backported from master:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index a7808a0e59e..fe85bc7903e 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240531
+20240601
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 32277bced6e..82e3a65b53f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,23 @@
+2024-05-31  Richard Sandiford  <richard.sandif...@arm.com>
+
+       Backported from master:
+       2024-01-29  Richard Sandiford  <richard.sandif...@arm.com>
+
+       PR target/113281
+       * gcc.dg/vect/pr113281-1.c: New test.
+       * gcc.dg/vect/pr113281-2.c: Likewise.
+       * gcc.dg/vect/pr113281-3.c: Likewise.
+       * gcc.dg/vect/pr113281-4.c: Likewise.
+       * gcc.dg/vect/pr113281-5.c: Likewise.
+
+2024-05-31  Richard Sandiford  <richard.sandif...@arm.com>
+
+       Backported from master:
+       2024-05-24  Richard Sandiford  <richard.sandif...@arm.com>
+
+       PR tree-optimization/115192
+       * gcc.dg/vect/pr115192.c: New test.
+
 2024-05-28  Tobias Burnus  <tbur...@baylibre.com>
 
        Backported from master:

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