Hi, We know gcc supply earlyclobber function to avoid register overlap,
but it can not describe explicitly for specific source operand, is it right ? The vector ISA spec of risc-v describe some register overlap rules here: https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#sec-vec-operands e.g. # Widening signed integer add/subtract, 2*SEW = 2*SEW +/- SEW vwadd.wv vd, vs2, vs1, vm # vector-vector it means vd can overlap vs2, but can not overlap vs1, there are more registers are wasted if gcc can not describe earlyclobber of vd only for vs1, also gcc will generate extra REG-REG move instruction :( Any suggestions ? Thanks. — Jojo