Hi! On Wed, Sep 23, 2020 at 10:50:52AM +0800, Jojo R wrote: > insn seqs: > > s1: > > __builtin_set_float_convert_mode(0); > r1 = __builtin_load(a1, a2); > r2 = __builtin_float_convert(r1); > __builtin_store(a3, r2); > __builtin_set_float_convert_mode(0); > > s2: > __builtin_set_float_convert_mode(1); > r1 = __builtin_load(a1, a2); > r2 = __builtin_float_convert(r1); > __builtin_store(a3, r2); > __builtin_set_float_convert_mode(0); > > > the diference of s1 and s2 only is "__builtin_set_float_convert_mode" > > from beginning, the s1 mode is set 0, but s2 mode is set 1. > > From optimization 'fwprop', the s2 insn seqs is deleted > > as dead code with compiler option ‘-O3', is it gcc bug ? > > > builtin patten of __builtin_set_float_convert_mode: > > (define_insn "target_fcvtmode" > [(set (reg:SI FCVTMODE_REGNUM) > (unspec_volatile:SI [(match_operand:SI 0 "operand" "rK")] UNSPECV_FCVTMODE))] > "" > "fcvtmode\t%1" > ) > > > builtin patten of __builtin_set_float_convert_mode: > > (define_insn "target_fcvt" > [(set (match_operand:SI 0 "register_operand" "=r") > (unspec:SI [(match_operand:SF 1 "register_operand" "f")] > UNSPEC_FCVT)) > (use (reg:SI FCVTMODE_REGNUM))] > "" > "fcvt\t%0,%1" > )
That "use" is mostly useless; what you should do afaics is make that FCVTMODE_REGNUM an input of the unspec (and it can just be an unspec, unspec_volatile isn't needed). > As far as i know, __builtin_set_float_convert_mode depend on > 'FCVTMODE_REGNUM' which is from > __builtin_set_float_convert_mode, it's not dead code. The output (operands[0]) does not depend on the convert mode setting, so the second one can be replaced by the first (in CSE or fwprop perhaps), and as end result you get what you observed. Look at what all RTL passes did to your code (-dap is easiest) to see what happened. HtH, Segher
