Hi all,
I'm trying to implement DWARF output for the AMD GCN target, and I've
run into trouble; -O0 debug works pretty well, but there are some
problems accessing variables in registers.
Problem 1 ....
The proposed DWARF specification for the target doesn't specify separate
DWARF registers for the high and low parts of certain 64 bit registers
(specifically EXEC and VCC), even though the hardware does.
Instead, one is expected to specify that EXEC_HI and VCC_HI are parts of
EXEC and VCC, but I'm pretty sure GCC can't do that.
How can I express that in DWARF, and how should I go about implementing
it in GCC? I think dwarf2out.c will need patching, but some clues about
where would be welcome.
Problem 2 ....
The GCN architecture makes it common to have scalars located in vector
registers (these are used with the other lanes masked off).
I have no problem expressing, in the DWARF, which register holds the
variable, but rocgdb still wants to treat the value as a vector, which
doesn't work so well in complex DWARF expressions.
The proposed DWARF specification includes a new directive
"DW_OP_LLVM_push_lane" to handle this, but of course GCC does not
support this yet.
How can I best implement this new feature, both in dwarf2out and in the
target hooks?
The proposed standard changes are here:
http://llvm.org/docs/AMDGPUUsage.html#dwarf-debug-information
http://llvm.org/docs/AMDGPUDwarfProposalForHeterogeneousDebugging.html
Thanks in advance
Andrew
