On 11/2/19 9:51 AM, Georg-Johann Lay wrote: > Segher Boessenkool schrieb: >>> Btw, does GCC support clobbering registers in branches (or >>> cbranch<mode>4 for that matter)? This requirement would come up when >>> transitioning avr to cc_mode because cbranches would live post reload. >> >> Of course. You cannot have *reloads* on branches, that is all. >> >> Segher > > Does this also apply to input reloads? > > Suppose cbranch with constraints like > > "d,r" > "n,r" > > for the operands to be compared, where d is a register class that > can be compared against immediate, but registers in r can't be > compared to n in general. > > For a case #2 target (only ccmode clobbers before reload), reload might > generate an input reload for the constant in the cbranch. > > So this is for bidden? This should work in the LRA world just fine. The problems are with output reloads, not input reloads.
With an output reload on a branch you have to emit the reload at the target(s) of the branch as well as the fallthru path (if one exists). In theory we could do this for simple branches, but for indirects it'd be virtually impossible. jeff
