On Wed, Jun 19, 2019 at 03:09:08PM +0200, Florian Weimer wrote: > * Segher Boessenkool: > > >> 0000000000000000 <__GI___getdents64>: > >> 0: addis r2,r12,0 > >> 0: R_PPC64_REL16_HA .TOC. > >> 4: addi r2,r2,0 > >> 4: R_PPC64_REL16_LO .TOC.+0x4 > >> 8: li r0,202 > >> c: sc > >> 10: mfcr r0 > > > > You also get this mfcr if the error code isn't used currently, even. And > > it uses mfcr always it seems, not mfocrf, or directly use the bit like in > > a conditional branch insn or an isel or whatnot. > > It's hard-coded in the glibc inline assembler fragment for system calls.
Yup. > I don't think the x/y constraints work in extended asm, despite being > documented in the manual. You cannot make a CCmode variable in C. > If they did, we could output the condition > register to a variable, say err, and then write > > err & (1 << 28) > > for the error check. We could implement flag output constraints for the powerpc port, the "=@" stuff. > GCC could then figure out that this actually > checks the condition register and use it directly. Thing is, the system call sets one CR bit, while the way GCC models this is with CR fields, four bits each -- and the bit that is used (the SO bit) isn't even modelled in GCC. Segher
