On 24/02/2019 18:29, Łukasz Kostka wrote:
Wiadomość napisana przez David Brown <david.br...@hesbynett.no> w dniu
24.02.2019, o godz. 14:58:
On 24/02/2019 14:47, Łukasz Kostka wrote:
Wiadomość napisana przez David Brown <david.br...@hesbynett.no
<mailto:david.br...@hesbynett.no>> w dniu 24.02.2019, o godz. 12:13:
This sort of thing has been an issue for all sorts of small microcontrollers,
and all their compilers, since their inception. It is not solvable in an ideal
way that gives maximal convenience to programmers and still results in
efficient code. The only good solution is to move away from such cpu designs -
there are very few reasons for choosing a core such as the AVR rather than an
ARM, MIPS or RISC-V alternative. (You might choose the AVR device for its
peripherals, or pin package, or power usage - but not for its core.)
Yes I know that AVR are old architecture.
I will move sooner or later to RISC-V or ARM. In fact bought some board from
sparkfun.
Does it mean that in newer cpu designs storing read only variables in flash is
easier than in AVR ?
Most 16-bit and 32-bit cpus have a single address space. Since the same
instructions are used to access data whether it is in ram or flash (or, in most
cases, IO register areas), there is no longer any issue.
The AVR uses different instructions for accessing data from flash and from ram,
which is what causes the complications.
Thx for clarification
BTW. Do you know if any ARM cortex or RISC-V provide such instructions to
access data in flash / rodata ?
No, neither ARM nor RISC-V has instructions to access data in flash or
read-only data - that is /precisely/ the point. Such data is accessed
exactly like ram data and any other data, using the same instructions
and from the same single flat memory space.
