Am 2018-11-19 um 15:36 schrieb Lokesh Janghel:
Hi Segher,
I am building the GCC with the following configuration ( using gcc trunk ).
../gcc/configure --target=powerpc-linux
--prefix=/opt/buckeye/powerpc-linux --disable-shared --disable-threads
--enable-languages=c --with-newlib
And my assembly code (without optimization) is:
$ cc1 -msvr4-struct-return test.c
.LFB0:
stwu 1,-32(1)
.LCFI0:
stw 31,28(1)
.LCFI1:
mr 31,1
.LCFI2:
lis 9,.LC0@ha
la 9,.LC0@l(9)
lhz 10,0(9)
lbz 9,2(9)
sth 10,11(31)
stb 9,13(31)
lhz 10,11(31)
lbz 9,13(31)
sth 10,8(31)
stb 9,10(31)
li 9,0
lbz 10,8(31)
rlwinm 10,10,0,24,31
slwi 10,10,16
rlwinm 9,9,0,16,7
or 9,9,10
lbz 10,9(31)
rlwinm 10,10,0,24,31
slwi 10,10,8
rlwinm 9,9,0,24,15
or 9,9,10
lbz 10,10(31)
rlwinm 10,10,0,24,31
rlwinm 9,9,0,0,23
or 9,9,10
mr 3,9
addi 11,31,32
lwz 31,-4(11)
.LCFI3:
mr 1,11
.LCFI4:
blr
Assembly code (with optimization -O2) is:
$ cc1 -msvr4-struct-return -O2 test.c
.LFB0:
stwu 1,-32(1)
.LCFI0:
lis 3,0x11
ori 3,3,0x2233
addi 1,1,32
.LCFI1:
blr
As you mentioned assembly code in the GCC Bugzilla, I am not able to
reproduce the issue.
Please let me know your options used to reproduce this issue.
Hi,
you already reproduced the issue, according to the ABI, the code should
look like:
.LFB0:
stwu 1,-32(1)
.LCFI0:
lis 3,0x1122
ori 3,3,0x3300
addi 1,1,32
.LCFI1:
blr
So the value being passed around should be left-aligned in the register.
Sirl,
If you got the patch for this issue or will look into the issue.
I have an unfinished patch, it misses commandline handling, testcases
and some code comments. I've attached it.
It's unlikely I can continue to work on it anytime soon :-(.
Franz
Index: gcc-trunk/gcc/config/rs6000/rs6000-opts.h
===================================================================
--- gcc-trunk/gcc/config/rs6000/rs6000-opts.h (revision 266271)
+++ gcc-trunk/gcc/config/rs6000/rs6000-opts.h (working copy)
@@ -130,6 +130,12 @@
CMODEL_LARGE
};
+/* */
+enum rs6000_svr4_struct_return {
+ SVR4_STRUCT_RETURN_GNU,
+ SVR4_STRUCT_RETURN_STD
+};
+
/* Describe which vector unit to use for a given machine mode. The
VECTOR_MEM_* and VECTOR_UNIT_* macros assume that Altivec, VSX, and
P8_VECTOR are contiguous. */
Index: gcc-trunk/gcc/config/rs6000/rs6000.c
===================================================================
--- gcc-trunk/gcc/config/rs6000/rs6000.c (revision 266271)
+++ gcc-trunk/gcc/config/rs6000/rs6000.c (working copy)
@@ -10616,7 +10616,9 @@
static bool
rs6000_return_in_msb (const_tree valtype)
{
- return (DEFAULT_ABI == ABI_ELFv2
+ return ((DEFAULT_ABI == ABI_ELFv2
+ || (DEFAULT_ABI == ABI_V4
+ && rs6000_current_svr4_struct_return == SVR4_STRUCT_RETURN_STD))
&& BYTES_BIG_ENDIAN
&& AGGREGATE_TYPE_P (valtype)
&& (rs6000_function_arg_padding (TYPE_MODE (valtype), valtype)
Index: gcc-trunk/gcc/config/rs6000/rs6000.opt
===================================================================
--- gcc-trunk/gcc/config/rs6000/rs6000.opt (revision 266271)
+++ gcc-trunk/gcc/config/rs6000/rs6000.opt (working copy)
@@ -92,6 +92,10 @@
TargetVariable
enum rs6000_cmodel rs6000_current_cmodel = CMODEL_SMALL
+;;
+TargetVariable
+enum rs6000_svr4_struct_return rs6000_current_svr4_struct_return =
SVR4_STRUCT_RETURN_GNU
+
;; What type of reciprocal estimation instructions to generate
TargetVariable
unsigned int rs6000_recip_control
