> On Jul 26, 2016, at 2:07 PM, Warren D Smith <warren....@gmail.com> wrote:
>
> To the guy who falsely claimed MIPS fails to provide an add with carry
> instruction,
> a google search in 1 minute finds this:
>
> stackoverflow.com/questions/1281806/adding-two-64-bit-numbers-in-assembly
>
> I defy you to find any processor not providing add with carry,
> (And I'm not talking about semantic bullshit. MIPS provides add with
> carry, even if they do not call it that, as this answer shows.)
Nonsense.
What that example shows is the standard assembly language coding for doing
multi-precision addition in machines that do NOT have an add-with-carry
instruction (or, as in the case of MIPS, even the concept of carry). The
algorithm is simple: add low order parts, see if the result is unsigned less
than one of the operands; if yes, add one to the sum of the high order parts.
Incidentally, note that this coding pattern only works for two's complement
integers.
> ...
> But the thing is, I'm not willing to write that stuff for you unless
> you promise to actually add these things to GCC. So, will anybody
> make that promise?
I very much doubt it. You might as well stop trying.
paul
