I like this position--with good kind natured folks arguing over the best way to help me. ;P
Thank you both. I took a quick look at Visium, and noticed arithmetic instructions in the .md file doing a lot of clobbering of the condition codes register. This doesn't seem very efficient, since it prevents the arithmetic instructions from being able to set the CC register and have that value be used. Am I reading this right? Is this an oversight, an initial pass at something more complicated, or the "right" way to do things? Thanks, Dan P.S. My apologies if this is a second copy. I have my mailer configured to automatically produce HTML ... On Mon, 2016-04-04 at 16:32 -0600, Jeff Law wrote: > On 04/04/2016 04:20 PM, Eric Botcazou wrote: > >> From a 30 second view of your ISA, it appears that most > >> arithmetic/logicals unconditionally set the condition codes. > >> > >> I would suggest modeling condition code handling similar to how it's > >> done on the x86 port. > > > > No advertisement intended, but the Visium architecture is the typical 32-bit > > RISC where every single arithmetic/logical unconditionally sets the > > condition > > code. Moreover, the port was very recently converted from CC0 to CCmode > > (with > > uniform post-reload splitters and define_substs tailored for the postreload > > compare elimination pass), so it could be a good model. > Visium might be an easier port to read/understand :-) > > jeff
