Thanks a lot for this fast answer.
Am 10.09.2015 um 19:52 schrieb David Edelsohn:
https://www.cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html
On Thu, Sep 10, 2015 at 1:39 PM, Bernhard Schommer
<bernhardschom...@gmail.com> wrote:
I just ran into something strange using gcc 8.4.3 for powerpc.
A call to the __atomic_load function:
__atomic_load(&Buf, &buf, __ATOMIC_SEQ_CST);
expands to:
sync
lis 9,Buf@ha
lwz 9,Buf@l(9)
cmpw 7,9,9
bne- 7,$+4
isync
stw 9,8(1)
However the PowerISA_V2.07 manual suggest in Appendix B.2.3 (Safe fetch)
that it should be
lwz r4,0(r3)#load shared data
cmpw r4,r4 #set CR0 to =E2=80=9Cequal=E2=80=9D
bne- $-8 #branch never taken
stw r7,0(r5)#store other shared data
So that the jump would be backwards and the load should be repeated instead
of skipping the isync.
Does anyone know what is correct in this case?
Best Regards,
-Bernhard
