Abe wrote:
of course this says nothing about whether there is *some* other ISA that gets
regressed!
After finishing fixing the known regressions, I intend/plan to reg-test for
AArch64;
after that, I think I`m going to need some community help to reg-test for other
ISAs.
OK, I'm confused. When you write "making the new if-converter not mangle
IR"...does "the new if-converter" mean your scratchpad fix to PR46029, or is
there some other new if-conversion phase that you are still working on and
haven't posted yet? If the latter, does this replace the existing
tree-if-conv.c, or is it an extra stage before that? I haven't yet understood
what you mean about "vectorizer-friendly" IR being mangled; is the problem that
your new phase transforms IR that can currently be if-converted by the existing
phase, into IR that can't? (Example?) Then I might (only "might", sorry!) be
able to help...
Cheers, Alan
