On 05/19/2014 02:13 AM, shmeel gutl wrote: > Are there hooks in gcc to deal with negative latencies? In other > words, an architecture that permits an instruction to use a result > from an instruction that will be issued later. >
Could you explain more on *an example* what are you trying to achieve with the negative latency. Scheduler is based on a critical path algorithm. Generally speaking latency time can be negative for this algorithm. But I guess that is not what you are asking. > At first glance it seems that it will will break a few things. > 1) The definition of dependencies cannot come from the simple ordering > of rtl. > 2) The scheduling problem starts to look like "get off the train 3 > stops before me". > 3) The definition of live ranges needs to use actual instruction > timing information, not just instruction sequencing. > > The hooks in the scheduler seem to be enough to stop damage but not > enough to take advantage of this "feature". >
