> From: Maciej W. Rozycki [ma...@codesourcery.com] > Sent: Friday, March 21, 2014 16:21 > To: Joseph S. Myers > Cc: Rich Fuhler; Matthew Fortune; Richard Sandiford; dal...@aerifal.cx; > Andrew Pinski (pins...@gmail.com); gcc@gcc.gnu.org; Moore, Catherine > (catherine_mo...@mentor.com) > Subject: RE: [RFC, MIPS] Relax NaN rules > > > Coprocessor loads (LWC1/LDC1/MTC1/MTHC1/DMTC1) and stores > (SWC1/SDC1/MFC1/MFHC1/DMFC1) are not arithmetic and never trap on any bit > patterns. I reckon GCC already takes advantage of this and stores > integers temporarily in FPRs in some cases. > > Maciej
Thanks Maciej, I blame it on the 387 - corrupted me for life...
