On 01/11/2013 07:20 PM, Michael Eager wrote:
I still think it's a bit odd. Other targets use the comparison
operator (e.g., lt, ge, etc.). Microblaze should as well.
Microblaze can't use the raw comparison operator because of how
the results of the cmp{,u} instructions are defined, especially
placing the result of < in the *high* bit.
You could, however, use two CCmodes for the result of the compares:
(set (reg:CC r) (compare:CC (reg:SI x) (reg:SI y)))
=> cmp r, x, y
(set (reg:CCU r) (compare:CCU (reg:SI x) (reg:SI y)))
=> cmpu r, x, y
and then the branch insns consume CC and CCU mode inputs:
(set (pc)
(if_then_else
(match_operator 1 "mb_signed_cmp_op" // eq, lt, le
[(match_operand:CC 2 "register_operand" "r")
(const_int 0)]0
(label_ref (match_operand 0))
(pc)))
and similar for "mb_unsigned_cmp_op" (eq, ltu, leu) with CCUmode.
I believe you'll find that MODE_CC modes default to word size
already, so if you arrange for mov{cc,ccu} patterns, reload will
spill/reload these values as required and everything will Just Work.
r~
