Over the last couple months I've been updating an out-of-tree back end for the TI MSP430 to support 20-bit functionality. This is a 16-bit microcontroller, where certain MCUs support 20-bit address and integer operations with an extended ISA and registers that can hold slightly more than one word.
GCC is not particularly ready to support such a chip, at least not with the architectural features I wanted. Some of the problems I encountered are described at: https://sourceforge.net/apps/mediawiki/mspgcc/index.php?title=Gcc47:20-Bit_Design#mixedmode My thanks to Bernd Schmidt and Paulo Matos for providing work-in-progress on their enhancements to address similar issues. Although neither approach suited my needs, it was very helpful to see what they'd done. 20-bit capable MSP430 support in gcc is now available out-of-tree; see http://www.mail-archive.com/mspgcc-users@lists.sourceforge.net/msg10989.html. The relevance to gcc is that I needed to make a variety of changes to gcc proper to support this architecture. These include: * [5f4ab69e90] Correction of some uses of Pmode where FUNCTION_MODE was appropriate ; * [03e6eb6cdb9, others] Correction of some uses of GET_MODE_BITSIZE where GET_MODE_PRECISION was required; * [ac85f5a18] Addition of target hooks that allow choice of different pointer and address modes in the same program, based on type trees. Since named address spaces aren't legal in C++, and aren't supported for functions, the existing capability could not be used. The changes include a refactoring of the current named address space infrastructure to obtain the address space from the type tree; * [822bc1e12d] Store the actual pointer and address modes in mem_attrs instead of assuming they can be reconstructed from the address space alone; * [803171c91e; 1eee7ac13b] Addition of target hooks for finer control of declaration placement in specific sections; * [5f0473808b] Addition of target hooks that permit a target-specific integer type to be used for SIZE_TYPE and PTRDIFF_TYPE. Though this is a gross hack, gcc's normal solution of promoting the internal 20-bit MODE_PARTIAL_INT PSImode to SImode is unworkable: conversion between PSImode and SImode is an extremely expensive operation. * [ffb61fc7ed] Allow selection of an exact-match MODE_PARTIAL_INT mode when smallest_mode_for_size is asked for MODE_INT satisfying a particular precision. Since none of these issues could be demonstrated in upstream gcc, I only filed bugzilla reports for the ones that seemed obviously wrong. At this time, integration of these changes upstream is out of scope, but I thought other gcc developers might be interested in seeing the patches, especially if they need to support a similar target. The MSP430 git repository for gcc can be browsed at http://mspgcc.git.sourceforge.net/git/gitweb.cgi?p=mspgcc/gcc;a=summary and the readme on that page points to a description of the branching conventions used in the repository. The patches that might be of interest to upstream gcc are in the commits identified in brackets in the list above. Thanks to everybody who's helped with this over the past several months. Peter
