On Tue, 2012-01-10 at 12:20 -0500, Vladimir Makarov wrote: > > Do we really need or want to create shuffle copies for insns that do not > > have a two operand constraint? > Yes, I think so. As I remember I did some benchmarking and it gave some > "order" in hard register assignments and improved code slightly (at > least for SPEC2000) even for 3-ops insn architectures.
I'm a little skeptical about 3-op insn architectures, but will take your word for it since you tested it. I may have someone on the team disable completely for ppc just as a test just so we can analyze why it helps. Sometimes just knowing why is a good thing. :) > Your patch might work. But we need to test it for major 2-ops > architecture x86/x86-64 and 3-ops ppc (I believe SPEC2000 would be ok > for this). Ok, I'll have someone on my team kick off this patch on ppc, but it would be nice if someone else could do the runs on x86/x86_64 or other cpus that might be affected that we don't have access to. Peter