On Mon, Aug 1, 2011 at 3:15 PM, H.J. Lu <hjl.to...@gmail.com> wrote:
> Hi,
>
> It turns out that x32 needs R_X86_64_64. One major reason is
> the displacement range of x32 is -2G to +2G. It isn't a problem
> for compiler since only small model is required for x32.
>
> However, to address 0 to 4G directly in assembly code, we have
> to use R_X86_64_64 with movabs. I am checking the follow patch
> into x32 psABI to allow R_X86_64_64.
>
>
X32 Linker should treats R_X86_64_64 as R_X86_64_32
zero-extended to 64bit for output. I will update x32 psABI with
---
diff --git a/object-files.tex b/object-files.tex
index 7f0fd14..d1543b5 100644
--- a/object-files.tex
+++ b/object-files.tex
@@ -451,7 +451,7 @@ or \texttt{Elf32_Rel} relocation.
\multicolumn{1}{c}{Calculation} \\
\hline
\texttt{R_X86_64_NONE} & 0 & none & none \\
- \texttt{R_X86_64_64} & 1 & \textit{word64} & \texttt{S + A} \\
+ \texttt{R_X86_64_64} $^{\dagger\dagger}$ & 1 & \textit{word64}
& \texttt{S + A} \\
\texttt{R_X86_64_PC32} & 2 & \textit{word32} & \texttt{S + A - P} \\
\texttt{R_X86_64_GOT32} & 3 & \textit{word32} & \texttt{G + A} \\
\texttt{R_X86_64_PLT32} & 4 & \textit{word32} & \texttt{L + A - P} \\
@@ -487,6 +487,8 @@ or \texttt{Elf32_Rel} relocation.
% \texttt{R_X86_64_PLT64} & 17 & \textit{word64} & \texttt{L + A - P} \\
\cline{1-4}
\multicolumn{3}{l}{\small $^\dagger$ This relocation is used only
for LP64.}\\
+ \multicolumn{3}{l}{\small $^{\dagger\dagger}$ This relocation only
+ appears in relocatable files for X32.}\\
\end{tabular}
\end{center}
\Hrule
----
I opened:
http://sourceware.org/bugzilla/show_bug.cgi?id=13082
and will fix it.
--
H.J.
