If I have two insns: r2 = r3 r3 = r4 It seems to me that the dependency analysis creates a dependency between the two and prevent parallelization. Although there is a dependency (because of r3) I want GCC to parallelize them together. Since if the insns are processed together the old value of r3 is used for the first insn before it is written by the second insn. How do I let GCC know about these things (When exactly each operand is used and when it is written)? Is it in these hooks? In which port can I see a good example for that?
Thanks, Roy. 2010/11/4 Ian Lance Taylor <i...@google.com>: > roy rosen <roy.1ro...@gmail.com> writes: > >> I am writing now the pipeline description in order to get a parallel code. >> My machine has many restrictions regarding which instruction can be >> parallelized with another. >> I am under the assumption that for each insn only one >> define_insn_reservation is matched. >> Is that correct? > > Yes. > >> If so then the number of define_insn_reservation is >> very high since I have to put here all possible attribute >> permutations. > > That may be true for your machine. > > Most processors, in fact all that I have ever worked with myself, have a > relatively small number of resources and instructions use them in > predictable ways. There are generally not that many combinations. That > is the case that gcc's scheduling code is written for. > > It sounds like your machine might be quite different: each instruction > has different resource requirements and uses them in different ways. > > The scheduler has a lot of hooks which you can define in your cpu.c > file. Their names all start with TARGET_SCHED. Those hooks make it > easier to, for example, use the scheduler with a VLIW machine. You > should read over the docs and see if you can use them to simplify your > scenario. > > Ian >
