---------------------------------------- > Subject: Re: atomicity of x86 bt/bts/btr/btc? > From: foxmuldrsterm > To: jay.krell > CC: gcc@gcc.gnu.org > Date: Tue, 19 Oct 2010 02:52:34 -0500 > > > ;; %%% bts, btr, btc, bt. > > ;; In general these instructions are *slow* when applied to memory, > > ;; since they enforce atomic operation. When applied to registers, > > > > I haven't found documented confirmation that these instructions are atomic > > without a lock prefix, > > having checked Intel and AMD documentation and random web searching. > > They are mentioned as instructions that can be used with lock prefix. > > They do not automatically lock the bus. They will lock the bus with the > explicit LOCK prefix, and BTS is typically used for an atomic read/write > operation. > > - Rick
Thanks Rick. I'll go back to using them. I'm optimizing mainly for size. The comment should perhaps be amended. The "since they enforce atomic operation" part seems wrong. - Jay
