Hi,
On Mon, 16 Aug 2010, Mohamed Shafi wrote:
> Hello all,
>
> I am trying to port GCC 4.5.1 for a processor that has the following
> addressing capability:
>
> The data memory address space of 64K bytes is represented by a total
> of 15 bits, with each address selecting a 16-bit element. When using
> the address register, the LSB of address reg (AD) points to a 16-bit
> field in data memory. If a data memory line is 128 bits there are 8,
> 16-bit elements per data memory line. We use little endian addressing,
> so
> if AD=0, bits [15:0] of data memory line address 0 would be selected.
bits [15:0] are 16 bits, not 15 bits.
> If AD=1, bits [31:16] of data memory line address 0 would be selected.
> If AD=9, bits [31:16] of data memory line address 1 would be selected.
>
> So if i have the following program
>
> short arr[5] = {11,12,13,14,15};
>
> int foo ()
> {
> short a = arr[0] + arr[3];
> return a;
> }
>
> Assume that short is 16bits and short address is 2byte aligned.Then I
> expect the following code to get generated:
>
> mov a0,#arr // Load the address
>
> mov a1, a0 // Copy the address
> add a1, 1 // Increment the location by 1 so that the address
> points to arr[1]
I assume that your source example above should have read "arr[1] + ..."
then.
> short arr[5] = {11,12,13,14,15};
>
> int foo ()
> {
> short a,b;
>
> a = (short) (&arr[3] - &arr[1]); // a is 2 after this operation
> b = (short) ((char*)&arr[3] - (char*)&arr[1]); // b is 4 after this operation
Nope, with BITS_PER_UNIT=16 also b would be 2. The reason is that the
number of bits in 'char' is BITS_PER_UNIT by default (you can define it
yourself to something else, but that would be even more bit-rotten than
BITS_PER_UNIT=16 support itself). Therefore
sizeof(short)==sizeof(char)==1 and both types would have 16 bits.
And yes, that has implications on memory use for e.g. ASCII strings.
> My question is should i set the macro BITS_PER_UNIT = 16 to get a code
> generated like this? From IRC chat i realize that BITS_PER_UNIT != 8
> is seriously rotten. If that is the case how can i proceed to port
> this target?
You could do like the alpha port does when BWX instructions aren't
available (in which case the alpha can only load/store whole words), using
aligned loads/stores, bit extraction/insertion, and a store back. I don't
know if that would be efficiently possible on your hardware.
Ciao,
Michael.
