redriver jiang <jiang.redri...@gmail.com> writes:
> I am porting GCC to a 8bit architecture, and now I have problem on
> reload problem on addressing mode.
> Besides 15 general registers, it has three 16bit address registers,
> R16,R17,R18.
> R16,R17,R18 are able to be as base register in "base" address mode,
> but only R18 can be base regs for "base+offse(immediate)t" address
> mode.
> I make "BASE_REGS" class for "R16,R17,R18", and "POINTER_REG" class
> for R18, and frame pointer is R18, the maxim "offset" in "base+offset"
> is 127.
>
> And now the test compiler sometimes generate following errors:
>
> test3.c: In function 'OS_EventTaskWait':
> test3.c:62: error: unable to find a register to spill in class 'POINTER_REG'
> test3.c:62: error: this is the insn:
> (insn 58 57 61 2 (set (mem/s:QI (plus:HI (reg:HI 16 R16 [51])
> (const_int 5 [0x5])) [0 <variable>.OSEventTbl S1 A8])
> (ior:QI (mem/s:QI (plus:HI (reg:HI 16 R16 [51])
> (const_int 5 [0x5])) [0 <variable>.OSEventTbl S1 A8])
> (mem/s:QI (plus:HI (reg:HI 17 R17 [orig:38 OSTCBCur.0 ] [38])
> (const_int 14 [0xe])) [0 <variable>.OSTCBBitX+0 S1
> A8]))) 25 {*iorqi3_noimm} (insn_list:REG_DEP_TRUE 51 (nil))
> (expr_list:REG_DEAD (reg:HI 17 R17 [orig:38 OSTCBCur.0 ] [38])
> (expr_list:REG_DEAD (reg:HI 16 R16 [51])
> test3.c:62: confused by earlier errors, bailing out.
You should be able to fix this by using constraints. Define a
constraint which uses the base register and define one which permits one
of the indirect registers. Write different alternatives such that only
one operand uses the base register in each alternative. Then reload
should be able to pick the best one, and reload the other addresses into
the indirect register.
Ian
