[email protected] wrote on 28/05/2010 03:52:30 PM:
> Hi,
>
> I just noticed today that (implicit) loops of the kind
>
> xmin = minval(nodes(1,inductor_number(1:number_of_nodes)))
>
> (lines 5057 to 5062 of the polyhedron test induct.f90) are no longer
> vectorized (the change occurred between revisions 158215 and
> 158921). With -ftree-vectorizer-verbose=6, I got
>
> induct.f90:5057: note: not vectorized: data ref analysis failed D.
> 6088_872 = (*D.4001_143)[D.6087_871];
>
> induct.f90:5057: note: Alignment of access forced using peeling.
> induct.f90:5057: note: Vectorizing an unaligned access.
> induct.f90:5057: note: vect_model_load_cost: unaligned supported by
hardware.
> induct.f90:5057: note: vect_model_load_cost: inside_cost = 2,
> outside_cost = 0 .
> induct.f90:5057: note: vect_model_simple_cost: inside_cost = 2,
> outside_cost = 0 .
> induct.f90:5057: note: vect_model_store_cost: inside_cost = 2,
> outside_cost = 0 .
> induct.f90:5057: note: cost model: prologue peel iters set to vf/2.
> induct.f90:5057: note: cost model: epilogue peel iters set to vf/2
> because peeling for alignment is unknown .
> induct.f90:5057: note: Cost model analysis:
> Vector inside of loop cost: 6
> Vector outside of loop cost: 20
> Scalar iteration cost: 3
> Scalar outside cost: 7
> prologue iterations: 2
> epilogue iterations: 2
> Calculated minimum iters for profitability: 5
>
> induct.f90:5057: note: Profitability threshold = 4
>
> induct.f90:5057: note: Profitability threshold is 4 loop iterations.
> induct.f90:5057: note: LOOP VECTORIZED.
>
> and now:
>
> induct.f90:5057: note: not vectorized: data ref analysis failed D.
> 6017_848 = (*D.4001_131)[D.6016_847];
>
> Is this known/expected or should I open a new PR?
The loop that computes MIN_EXPR is not vectorizable because of indirect
access. You see for both versions:
induct.f90:5057: note: not vectorized: data ref analysis failed D.
6017_848 = (*D.4001_131)[D.6016_847];
The loop that got vectorized in the older revision is another loop
associated with the same source code line:
<bb 78>:
# S.648_810 = PHI <S.648_856(77), 0(75)>
S.648_856 = S.648_810 + 1;
D.6082_858 = (*D.4108_840)[S.648_810];
D.6083_859 = (integer(kind=8)) D.6082_858;
(*pretmp.3557_2254)[S.648_810] = D.6083_859;
if (D.4111_844 < S.648_856)
goto <bb 79>;
else
goto <bb 77>;
And in the later revision this loop is replaced with:
<bb 75>:
D.6008_833 = &(*D.5896_830)[0];
pretmp.3873_1387 = (integer(kind=4)[0:] *) D.6008_833;
So, there is no loop now.
Ira
>
> Cheers
>
> Dominique
